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Journal Articles

Status of operation data archiving system using Hadoop/HBase for J-PARC

Kikuzawa, Nobuhiro; Ikeda, Hiroshi; Kato, Yuko; Ouchi, Nobuo; Yoshii, Akinobu*

Proceedings of 10th International Workshop on Personal Computers and Particle Accelerator Controls (PCaPAC 2014) (Internet), p.193 - 195, 2015/02

J-PARC (Japan Proton Accelerator Research Complex) consists of much equipment. In Linac and 3 GeV rapid cycling synchrotron ring (RCS), the data of over the 64,000 EPICS records for these equipment has been collected. The Data volume is about 2 TB in every year, and the stored total data volume is about 10 TB. The data have been being stored by a Relational Data Base (RDB) system using PostgreSQL, but it is not enough in availability, performance, and capability to increase of data volume flexibility. Hadoop/HBase, which is known as a distributed, scalable and big data store, has been proposed for our next-generation archive system to solve these problems. The test system was built and verified about data transition or database utilization. This report shows the current status of the new archive system, and its advantages and problems which have been obtained through our verification.

Oral presentation

FPGA utilization of the accelerator interlock system through MPS development in LIPAc

Nishiyama, Koichi; Takahashi, Hiroki; Sakaki, Hironao; Narita, Takahiro; Kojima, Toshiyuki*; Knaster, J.*; Marqueta, A.*

no journal, , 

The development of IFMIF(International Fusion Material Irradiation Facility) to generate a 14 MeV source of neutrons with the spectrum of DT fusion reactions is indispensable to qualify suitable materials for the First Wall of the nuclear vessel in fusion power plants. As part of IFMIF validation activities, LIPAc (Linear IFMIF Prototype Accelerator) facility, currently under installation at Rokkasho (Japan), will accelerate a 125 mA CW and 9 MeV deuteron beam with a total beam power of 1.125 MW. The Machine Protection System (MPS) of LIPAc provides an essential interlock function of stopping the beam in case of anomalous beam loss or other hazardous situations. High speed processing is necessary to achieve properly the MPS main goal. This high speed processing of the signals, distributed alongside the accelerator facility, is based on FPGA (Field Programmable Gate Array) technology. This paper describes the basis of FPGA use in the accelerator interlock system through the development of LIPAc.

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